Sunwook Hwang, Ph.D.

NPU Performance Architect for AI Systems

Digital IP/Circuit Chip Design · SOC IP Development Team (S.LSI)
Samsung Electronics

I am an NPU hardware performance architect working at the intersection of AI workload behavior, accelerator microarchitecture, and inference execution. At Samsung Electronics, I drive performance architecture and optimization for flagship Exynos NPUs, including workload characterization, performance modeling, bottleneck analysis, compiler-aware scheduling, memory/dataflow tuning, and inference-time optimization.

My research background is in AI systems for 3D perception and autonomous driving, covering semi-supervised object detection, model inversion attacks on 3D feature representations, video analytics, and V2X communication. Together with my current NPU architecture work, this gives me a cross-layer view of how AI workloads are designed, mapped, and executed on real hardware. I have published at ICCV and ICLR and hold multiple patents in the US and Korea.

Employment

- Samsung Electronics, Korea

- Seoul National University (SNU), Seoul, Korea


Focus Areas


Education

- Ph.D. in ECE from SNU in Aug. 2023

- B.S. in EE from POSTECH in Feb. 2016


Current Collaborators


Journals & Conferences


Intellectual Properties

- Patents

- Software Intellectual Properties


Research Projects


Professional Activities

- Reviewer


Tutorials